Sure, Fujitsu has a right to be pleased with its K supercomputer — performing over 8 petaflops with slightly below 70,000 Venus CPUs is nothing to sneeze at. Intel isn’t giving up its status because the supercomputing CPU king, however, because it plans to bring exascale computing to the arena by the tip of this decade. This sort of machine could do a million trillion calculations per second, and Intel plans to make it happen with its Many Integrated Core Architecture (MIC). The primary CPUs designed with MIC, codenamed Knights Corner, are built on a 22nm process that utilizes the company’s 3D Tri-Gate transistors and packs over 50 cores per chip. These CPUs are designed for parallel processing applications, kind of like the NVIDIA GPUs in order to be utilized in a DARPA-funded supercomputer we learned about last year. Here we thought the war between these two was over — looks as if a brand new one’s just getting started. PR’s after the break.
Intel® Many Integrated Core (Intel® MIC) Architecture Shows Strength as Critical Element of Intel’s Exascale Computing Solution
NEWS HIGHLIGHTS
With collaboration partners, Intel aims to deliver complete technology solution for exascale performance by the top of the last decade.
Demonstrations from key supercomputing centers akin to Forschungszentrum Juelich, Leibniz Supercomputing Centre, CERN and KISTI underscore momentum of Intel® Many Integrated Core Architecture.
Intel processor-powered supercomputers make up 77 percent of the newest TOP500 list of supercomputers and nearly 90 percent of all new systems in 2011.
International Supercomputing Conference 2011
SANTA CLARA, Calif. & HAMBURG, Germany–(BUSINESS WIRE)–On the International Supercomputing Conference (ISC), Kirk Skaugen, Intel Corporation vice chairman and general manager of the info Center Group, outlined the company’s vision to realize ExaFLOP/s performance by the top of this decade. An ExaFLOP/s is quintillion computer operations per second, hundreds times greater than today’s fastest supercomputers.
“Intel is uniquely equipped with unparalleled manufacturing technologies, new architecture innovations and a well-known software programming environment with a purpose to bring us in the direction of this exciting exascale goal.”
Reaching exascale levels of performance sooner or later won’t only require the combined efforts of industry and governments, but in addition approaches being pioneered by the Intel® Many Integrated Core (Intel® MIC) Architecture, in line with Skaugen. Managing the explosive growth within the amount of information shared around the Internet, finding solutions to climate change, managing the growing costs of accessing resources corresponding to oil and gas, and a mess of alternative challenges require increased amounts of computing resources that only increasingly high-performing supercomputers can address.
“While Intel® Xeon® processors are the clear architecture of choice for the present TOP500 list of supercomputers, Intel is further expanding its deal with high-performance computing by enabling the industry for the subsequent frontier with our Many Integrated Core architecture for petascale and future exascale workloads,” said Skaugen. “Intel is uniquely equipped with unparalleled manufacturing technologies, new architecture innovations and a well-recognized software programming environment which will bring us in the direction of this exciting exascale goal.”
Paving find out how to Exaflop Performance
Intel’s relentless pursuit of Moore’s Law — doubling the transistor density on microprocessors roughly every 2 years to extend functionality and function while decreasing costs — combined with an innovative, highly efficient software programming model and extreme system scalability were noted by Skaugen as key ingredients for crossing the edge of petascale computing right into a new era of exascale computing. With this increase in performance, though, comes a major increase in power consumption.
As an illustration, for today’s fastest supercomputer in China, the Tianhe-1A, to realize exascale performance, it might require greater than 1.6 GW of power – an amount big enough to provide electricity to two million homes – thus presenting an energy efficiency challenge.
To handle this challenge, Intel and European researchers have established three European labs with three main goals: to create a sustained partner presence in Europe; make the most of the growing relevance of European high-performance computing (HPC) research; and exponentially grow capabilities in computational science, engineering and strategic computing. Among the technical goals of those labs is to create simulation applications that start to address the energy efficiency challenges of moving to exascale performance.
Skaugen said there’s the potential of tremendous growth of the HPC market. While supercomputers from the 1980s delivered GigaFLOP/s (billions of floating point operations per second) performance, today’s strongest machines have increased this value by several million times. This, in turn, has increased the demand for processors utilized in supercomputing. By 2013 Intel expects the head 100 supercomputers on this planet to take advantage of a million processors. By 2015 this number is predicted to double, and is forecasted to achieve 8 million units by the tip of the last decade. The performance of the TOP500 #1 system is estimated to achieve 100 PetaFLOP/s in 2015 and break the barrier of one ExaFLOP/s in 2018. By the tip of the last decade the fastest system in the world is forecasted which will provide performance of greater than 4 ExaFLOP/s.
Intel MIC Architecture Software Development Momentum
The Intel MIC architecture is a key addition to the company’s existing products, including Intel Xeon processors, and expected to aid lead the industry into the era of exascale computing. The 1st Intel MIC product, codenamed “Knights Corner,” is planned for production on Intel’s 22-nanometer technology that featuring innovative 3-D Tri-Gate transistors1. Intel is currently shipping Intel MIC software development platforms, codenamed “Knights Ferry,” to choose development partners.
At ISC, Intel and a few of its partners including Forschungszentrum Juelich, Leibniz Supercomputing Centre (LRZ), CERN and Korea Institute of Science and Technology Information (KISTI) showed early result of their work with the “Knights Ferry” platform. The demonstrations showed how Intel MIC architecture delivers both performance and software programmability advantages.
“The programming model good thing about Intel MIC architecture enabled us to quickly scale our applications running on Intel Xeon processors to the Knights Ferry Software Development Platform,” said Prof. Arndt Bode of the Leibniz Supercomputing Centre. “This workload was originally developed and optimized for Intel Xeon processors but as a result of the familiarity of the programming model lets optimize the code for the Intel MIC architecture within hours and likewise achieved over 650 GFLOPS of performance.”
Intel also showed server and workstation platforms from SGI, Dell, HP, IBM, Colfax and Supermicro, all of which can be working with Intel to plot products in line with “Knights Corner.”
“SGI recognizes the importance of inter-processor communications, power, density and usefulness when architecting for exascale,” said SGI CTO Dr. Eng Lim Goh. “The Intel MIC products will satisfy all four of those priorities, especially with their anticipated increase in compute density coupled with familiar X86 programming environment.”
TOP500 Supercomputers
The 37th edition of the Top500 list, which was announced at ISC, shows that Intel is still a force in high-performance computing, with 387 systems or greater than 77 percent, powered by Intel processors. Out of all new systems to the list in 2011, Intel powered systems accounted for near to 90 percent. Greater than 1/2 these new additions are in line with latest 32nm Intel Xeon 5600 series processors which now alone power greater than 35% of all systems in TOP500 list, 3 times the quantity comparing to last year. Intel also powers 5 systems in top 10.
The semi-annual TOP500 list of supercomputers is the work of Hans Meuer of the University of Mannheim, Erich Strohmaier and Horst Simon of the U.S. Department of Energy’s National Energy Research Scientific Computing Center, and Jack Dongarra of the University of Tennessee. The whole report is on the market at www.top500.org.
Additional information on ISC’11 including detailed description of showcased Intel MIC architecture-based demos and function, Skaugen’s presentation and images can be found at http://newsroom.intel.com/docs/DOC-2152.
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